SMART Photonics BV (The Netherlands) – SMART

SMART Photonics B.V. is a pure-play foundry for InP photonics semiconductors. The company started in March 2012 and is located in Eindhoven, The Netherlands. It offers its customers an expert team with long history and proven track record in InP Research, Development and production. The team has many former employees of both Philips Photonic Labs and TU Eindhoven, with a broad experience in epitaxy (growth and regrowth), processing, test & measurement and quality control. SMART Photonics offers a generic integration process, developed in collaboration with the COBRA research institute. SMART Photonics is the world's first foundry to offer MPW services for InP based integrated circuits on a semicommercial basis. The company’s uniqueness lies in the fact that it combines a pure-play foundry approach, a dedicated photonics clean-room for InP semiconductors, an experienced engineering team, and a generic process in which customers can design based on functional building blocks, rather than technological steps. The latter method is common in electronics, but new for the photonics industry. Examples of products developed for customers include: EML, (high power) DFB lasers, integrated transmitters and receivers for Fiber to the Home (FTTH). SMART Photonics has their own 3” production facility for InP PICs including two multi-wafer MOVPE epi reactors, stepper lithography, etching, in-line monitoring and test tools. Moreover, SMART Photonics has access to the NanoLab@TU/e clean-room with state of the art equipment for InP PIC fabrication and testing.

Role in the project

SMART Photonics will provide the premium grade InP-based integration platform for the quantum-optic communication components developed within the project in WP3. This asks for the development of high precision
optical building blocks in combination with an advanced functional design framework to accurately simulate and optimize circuit performance, capabilities and trade-offs. Moreover, SMART Photonics will work on the reproducibility of InP PICs through close interaction of modelling and simulation with the fabrication and analysis of test structures on both multi-project wafers and dedicated runs. Finally we will provide input and support to the project partners responsible for PIC design and for system integration and assembly in WP2 and WP6, respectively.

Key personnel

Antonio Bonardi